EDA & Ecosystem

Technology

Engineering Support

Discuss custom solutions with our engineering team.

We partner with industry-leading EDA vendors to provide robust, silicon-verified Process Design Kits (PDKs) and IP libraries, enabling seamless tape-out for our customers.

Strategic Partners

Cadence

Virtuoso, Innovus, Spectre

Synopsys

Custom Compiler, IC Compiler

Siemens EDA

Calibre, HyperLynx

Ansys

RedHawk, HFSS, Icepak

Process Design Kits

Silicon-validated PDKs with comprehensive device models, DRC/LVS rule decks, and parameterized cells.

SPICE models (BSIM3/4, PSP)
DRC & LVS rule decks
Pcell libraries & standard cells
Foundry-specific design guidelines
Multi-corner & Monte Carlo support

IP Portfolio

Pre-qualified IP blocks to accelerate your design cycle and reduce risk.

Standard cell libraries (HVT/SVT/LVT)
I/O libraries (1.8V – 5V)
SRAM & ROM compilers
Analog IP (ADC, DAC, PLL, LDO)
ESD protection structures

Design Support Flow

PDK Access

NDA & PDK distribution

Design Review

DFM & DFT consultation

Tape-Out

GDS validation & mask order

Silicon

Wafer fab & qualification